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RAK3212 WisDuo LoRaWAN + BLE + WiFi Breakout Board (RAK3112 / ESP32-S3 + SX1262)

Source

RAKwireless docs (overview):

What it is

RAK3212 is a breakout board featuring the RAK3112 module, combining:

  • MCU: Espressif ESP32-S3
  • LoRa transceiver: Semtech SX1262

It supports:

  • LoRaWAN
  • BLE 5.0
  • Wi‑Fi

And it exposes the RAK3112 pins via headers for rapid prototyping.

Key features (from vendor overview)

  • Provides all RAK3112 pins via header
  • LoRaWAN 1.0.2 compliant
  • Activation: OTAA / ABP
  • LoRa P2P supported
  • BLE 5.0 + Wi‑Fi
  • Custom firmware using Arduino (vendor note)
  • I/O: UART / I2C / SPI / ADC / GPIO
  • Long range claim: >10 km (with optimized antenna)

Supported LoRaWAN bands

Vendor lists:

  • IN865
  • EU868
  • AU915
  • US915
  • KR920
  • RU864
  • AS923-1 / AS923-2 / AS923-3 / AS923-4

Electrical / environmental

  • Supply voltage: 3.0 V ~ 3.6 V
  • Temperature range: -40°C ~ 65°C

Mechanical

  • Dimensions: 29 mm × 40 mm × 4.28 mm

Integration notes (practical)

Firmware stacks

Depending on project needs, pick one:

  • ESP-IDF (recommended for full control + production firmware)
  • PlatformIO (fast setup + libraries; good for prototypes)
  • Arduino (fastest learning curve; vendor mentions support)

LoRaWAN stack choice

  • If you’re using ChirpStack in your lab (like your AS923 workflow), standardize on OTAA and define:
    • region/sub-band
    • uplink interval + duty-cycle compliance
    • payload format (binary recommended)

RF considerations

  • Antenna quality and ground plane matter a lot for range.
  • Keep LoRa antenna away from high-noise DC/DC and high-speed digital lines.

Quick Start highlights (practical)

Source:

Hardware basics

  • Power + firmware update/serial comms via onboard USB‑C.
  • Antenna warning (important): Connect LoRa + Wi‑Fi/BLE antennas properly. Powering without an antenna on the IPEX MHF4 connectors can damage the RF section.
  • Connector note: the board uses a low-profile IPEX variant (MHF4). Standard IPEX connectors may not fit.

Firmware setup notes

  • Vendor notes the board ships without pre-installed firmware; you must flash your own.
  • Official Arduino support via Espressif BSP (board name noted as RAKwireless RAK3112).

PlatformIO (vendor-provided workaround)

The docs include a temporary approach that adds a rakwireless/ folder to your project and points PlatformIO to it.

Key snippet (from their guide):

[platformio]
default_envs = rak3112
description = RAK3112
boards_dir = rakwireless/boards

[env:rak3112]
framework = arduino
platform = platformio/espressif32
board = rak3112
build_flags = -I rakwireless/variants/rak3112

They reference a patch folder here:

LoRaWAN region note

Their example references AS923 variants (they show enumerations including AS923_2/_3/_4). For our lab we’ll align to the ChirpStack region plan you choose.

Pin headers / IO (from Quick Start)

The Quick Start page provides a full header mapping. Highlights:

  • The board breaks out pins to 4 headers: J3/J4/J5/J6.
  • Notes/limitations:
    • GPIO33–GPIO37 are not available in some flash/PSRAM configurations.
    • GPIO4 used internally and not available.

Boot pin

  • GPIO0 / Boot is exposed (used to force bootloader mode).

Datasheet highlights (hardware details)

Source:

RF characteristics (useful numbers)

  • LoRa TX power: programmable up to +22 dBm
  • LoRa sensitivity (examples listed):
    • ~-124 dBm (BW 125k, SF7)
    • ~-137 dBm (BW 125k, SF12)

Wi‑Fi / BLE bands

  • Wi‑Fi: 2412–2484 MHz
  • BLE: 2402–2480 MHz

More in datasheet (to extract next)

  • “Internal connections” table (ESP32-S3 ↔ SX1262)
  • Interfaces table
  • Full pin definition tables (J3/J4/J5/J6)
  • Operating current / sleep current tables
  • Schematic diagram

Pinout visibility (Mermaid)

These diagrams are for quick visual mapping (not electrical schematics).

flowchart TB
subgraph J3[Header J3 (Power + Boot)]
J3_1[1: 5V (USB)]
J3_2[2: 5V (USB)]
J3_3[3: GND]
J3_4[4: GND]
J3_5[5: GND]
J3_6[6: GPIO0 / BOOT]
J3_7[7: GND]
J3_8[8: VCC 3.3V]
J3_9[9: VCC 3.3V]
end

subgraph J4[Header J4 (GPIO + I2C)]
J4_1[1: GPIO18 / I2C2 SCL]
J4_2[2: GPIO21 / AIN0]
J4_3[3: GPIO38]
J4_4[4: GPIO39]
J4_5[5: GPIO40 / I2C1 SCL]
J4_6[6: GPIO41]
J4_7[7: GPIO42]
J4_8[8: GPIO45]
J4_9[9: GPIO46]
end

subgraph J5[Header J5 (GPIO + I2C + SPI)]
J5_1[1: GPIO1]
J5_2[2: GPIO2]
J5_3[3: GPIO9 / I2C1 SDA]
J5_4[4: GPIO10 / SPI MISO]
J5_5[5: GPIO11 / SPI MOSI]
J5_6[6: GPIO12 / SPI CS]
J5_7[7: GPIO13 / SPI SCK]
J5_8[8: GPIO14 / AIN1]
J5_9[9: GPIO17 / I2C2 SDA]
end

subgraph J6[Header J6 (UART0 + Limited Pins)]
J6_1[1: GPIO33 (N/A w/16MB PSRAM)]
J6_2[2: GPIO34 (N/A w/16MB PSRAM)]
J6_3[3: GPIO35 (N/A w/16MB PSRAM)]
J6_4[4: GPIO36 (N/A w/16MB PSRAM)]
J6_5[5: GPIO37 (N/A w/16MB PSRAM)]
J6_6[6: GPIO4 (NC)]
J6_7[7: UART0_RX]
J6_8[8: UART0_TX]
J6_9[9: GND]
end
end

Pinout quick reference (condensed)

Source tables: Quick Start + Datasheet

J3 (power + boot)

  • 5V USB: pins 1–2
  • GND: pins 3–5, 7
  • GPIO0 / Boot: pin 6 (force bootloader)
  • 3.3V (VCC): pins 8–9

J4 (GPIO + I2C)

  • I2C2 SCL: GPIO18 (pin 1)
  • AIN0: GPIO21 (pin 2)
  • I2C1 SCL: GPIO40 (pin 5)
  • Extra GPIO: 38,39,41,42,45,46

J5 (GPIO + I2C + SPI)

  • I2C1 SDA: GPIO9 (pin 3)
  • SPI: MISO GPIO10 (pin 4), MOSI GPIO11 (pin 5), CS GPIO12 (pin 6), SCK GPIO13 (pin 7)
  • AIN1: GPIO14 (pin 8)
  • I2C2 SDA: GPIO17 (pin 9)

J6 (UART0 + limited pins)

  • UART0 RX/TX: pins 7–8
  • GND: pin 9
  • GPIO33–37: marked N/A with 16MB PSRAM
  • GPIO4: NC (not available)

Electrical characteristics (from datasheet)

Operating voltage

  • VDD: 3.0V min, 3.3V typical, 3.6V max

Operating current (3.3V @ 25°C)

Wi‑Fi TX peak:

  • 802.11b 1Mbps @21dBm: 340 mA
  • 802.11g 54Mbps @19dBm: 291 mA
  • 802.11n HT20 MCS7 @18.5dBm: 283 mA
  • 802.11n HT40 MCS7 @18dBm: 286 mA

Wi‑Fi RX:

  • HT20: 88 mA
  • HT40: 91 mA

LoRa TX peak (868–915MHz):

  • +22 dBm: 140 mA
  • +20 dBm: 127.5 mA
  • +17 dBm: 118 mA
  • +14 dBm: 112 mA

LoRa RX:

  • LoRa 125 kHz: 25.46 mA

Sleep current

  • Light-sleep: 241 µA max
  • Deep-sleep (RTC mem+peripherals on): 9 µA max
  • Deep-sleep (RTC mem on, peripherals off): 8 µA max
  • Power off (CHIP_PU low): 2 µA max

What to capture next (remaining gaps)

  • Default programming method and bootloader/reset sequence (ESP32‑S3 specifics for this board)
  • Internal ESP32‑S3 ↔ SX1262 connection table (useful for low-level debugging)

Changelog

  • 2026-02-14: Added initial library entry from vendor overview page.